[This is an old published paper. I am hosting it online to benefit CiteSeer.]

Abstract:

Error correcting decoder’s performance is crucial for communication systems. Since the performance of Turbo codes is close to the Shannon limit, ultra high-speed turbo decoder is desired. The aim of this design is to demonstrate the feasibility of implementing high-speed Turbo decoders in analog VLSI using SiGe BiCMOS technology. Detailed conceptual design is presented. Simulation results show higher performance than any known decoders in term of decoding speed. Testing plans are also presented.

Citation:

W. Huang, Vinay Igure, G. Rose, Y. Zhang, M. Stan, “Analog Turbo Decoder Implemented in SiGe BiCMOS Technolgy”, Honorable Mention Winner (Fourth Position) at the 40th Design Automation Conference (DAC) Student Design Contest, June 2003; Also selected for Poster Presentation at the ISSCC 2004; Selected among the top 15 teams in the first Phase of the Semiconductor Research Corporation’s (SRC) SiGe Design Contest 2002 ‐2003

Full Paper: UVA_Turbo_DAC